| SNO |
Projects List |
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| 1 |
A Modified Partial Product Generator for Redundant Binary Multipliers |
| 2 |
An Efficient Hardware Implementation of Canny Edge Detection Algorithm |
| 3 |
Approximate Radix-8 Booth Multipliers for Low-Power and High-Performance Operation |
| 4 |
A High-Performance FIR Filter Architecture for Fixed and Reconfigurable Applications |
| 5 |
The Serial Commutator (SC) FFT |
| 7 |
An Improved Signed Digit Representation Approach for Constant Vector Multiplication |
| 8 |
High-Speed and Energy-Efficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels |
| 9 |
A New XOR-Free Approach for Implementation of Convolutional Encoder |
| 10 |
Energy and Area Efficient Three-Input XOR/XNORs With Systematic Cell Design Methodology |
| 11 |
Approximate Radix-8 Booth Multipliers for Low-Power and High-Performance Operation |
| 12 |
Implementation of a PID control PWM Module on FPGA |
| 13 |
Built-in Self Testing of FPGAs |
| 14 |
An FPGA-Based Cloud System for Massive ECG Data Analysis |
| 15 |
Distributed Sensor Network-on-Chip for Performance Optimization of Soft-Error-Tolerant Multiprocessor System-on-Chip |
| 16 |
ME Implementation of Fully Parallel LTE Turbo Decoders |
